M-PESTI (Modular Peripheral Sideband Tunneling Interface) is a small signaling protocol in the OCP DC-MHS standard. It does two jobs on one wire: it carries sideband signals as "virtual wires" so the connector does not need a pin for each, and it lets the host detect and identify a cabled module before the system boots. For a connector designer, the effect is a lower pin count and a defined handshake on one presence pin.
In short:
- M-PESTI runs on one bidirectional wire named CBL_PRES_PESTI_N on the M-XIO port.
- It serializes virtual wires over that wire, so sideband signals do not need their own pins.
- If M-PESTI is not implemented, the pin falls back to a simple cable-present signal.
- The message format is defined in a separate M-PESTI specification, which this article does not reproduce.
For the PCIe port itself, see DC-MHS and M-XIO.
What Problem It Solves
A PCIe link needs sideband signals next to the high-speed lanes, such as presence, reset and management lines. A cabled PCIe connector has limited pins, and more sideband lines mean more pins or a bigger connector. M-PESTI keeps the connector small by sending those sidebands as virtual wires over a single line instead of dedicated pins.
How It Works
The M-XIO base specification describes M-PESTI as serializing and deserializing virtual wires over a single wire. The wire, CBL_PRES_PESTI_N, is a dual-purpose bidirectional line. The specification says the virtual wires can carry custom, standard or future form-factor-specific sidebands. It supports bidirectional, low-latency virtual wires between link partners such as a CPLD, a microcontroller or an ASIC, without losing basic presence detection.
M-PESTI is kept separate from higher-level management such as MCTP, which the specification says suit I2C and non-real-time handling better. The protocol is self-describing, can be extended to peripheral modules over device presence wires, and includes firmware update and optional immutable attestation of the link partner's firmware.
One vendor's IP core for M-PESTI describes it as supporting early peripheral presence detection and attribute collection before boot, using an initiator command and target response structure. In that implementation the link is a half-duplex UART at 250k baud with 8 data bits, odd parity and a CRC-8 checksum on the discovery payload, with one initiator and up to 64 targets. Treat that as one implementation's description. The specification itself refers to a separate M-PESTI document for the details.
The Presence Pin States
CBL_PRES_PESTI_N also works as a plain presence indicator. It signals that a cable assembly or module is attached, not that an endpoint is present. The specification lists these states:
- Nothing installed: the host sees a logic high.
- Present, no power: a bleed resistor pulls the line low, and the host assumes no local power.
- Powered, target hardware default: the target's hardware defaults to high impedance, creating a rising edge, and commands are not acknowledged.
- Powered, target application code running: the target issues a low pulse (a break) and then listens for commands.
If M-PESTI is not implemented, the cable or interposer side holds the line low. The fixed side pulls it up through a resistor between 7.5 kohm and 200 kohm to the 3.3 V auxiliary management supply.
What It Means for Connector Selection
- Pin availability: the connector must expose the CBL_PRES_PESTI_N pin in the M-XIO pinout you choose.
- Cable assembly: a cable that does not use M-PESTI has to pull the pin low. A cable with active electronics at the far end has to implement the protocol.
- Pull-up values: the host's pull-up has to fall within the 7.5 to 200 kohm range.
- Auxiliary power: the 3.3 V management supply has to reach the host-side pull-up.
- Testing: presence detection should be tested with cable removed, cable only and powered module cases.
Frequently Asked Questions
What does M-PESTI stand for? Modular Peripheral Sideband Tunneling Interface.
Which signals does it carry? Virtual wires for custom, standard or form-factor sidebands. The M-XIO base specification does not list individual signals, so check the M-PESTI specification.
Is M-PESTI required? No. Without it, the pin acts as a cable-present line.
Is it the same as I2C or MCTP? No. It is kept separate from those management protocols.
Where to Go Next
Sources
- OCP M-XIO base specification v0.7, a candidate draft: M-PESTI purpose, wire, presence states and pull-up values.
- Lattice M-PESTI IP core: one implementation's link and discovery description.