At the OCP Global Summit 2026, NVIDIA and Cisco announced USFP, short for Ultra-Dense Small Form Factor Pluggable. It is a new optical module format for AI fabrics, designed for 400 Gb/s per lane. For connector engineers, the interesting part is that USFP comes with a new electrical connector, not just a faster module.
This article lays out what the companies have confirmed, what they have not, and what the design choices suggest about the connector.
In short:
- USFP targets 400 Gb/s per lane, with 16 lanes in the first planned modules and a path to 32 or more.
- The first modules are about the size of an OSFP module and can dissipate up to 100 W.
- The host connector is a new two-dimensional array with a two-step insertion sequence.
- There is no availability date yet, and the open specification is still only planned.
What Was Announced
- Lane rate: 400 Gb/s per lane (electrical), scaling down from 200 Gb/s per lane
- Lanes: 16 full-duplex lanes in the first planned modules (6.4 Tb/s); expansion to 32 or more lanes (12.8 Tb/s)
- Size: First modules are about OSFP-sized
- Density and efficiency: Claimed 4x the bandwidth and front-panel bandwidth density of 200 Gb/s-per-lane pluggables, and about 1.3x the power efficiency
- Power and cooling: Supports up to 100 W dissipation without a separate cooling circuit inside the transceiver
- Host connector: New two-dimensional array connector with two-step insertion; high-speed contacts engage after insertion
- Ecosystem: NVIDIA and Cisco, working with TE Connectivity and Amphenol on cages, connectors and modules
- Standardization: An open specification through a planned community-led multi-source agreement (MSA)
- Intended use: Switches and SuperNICs
- Availability: No date announced
The announcement was made at the OCP Global Summit, but the companies have not said that OCP will govern the specification.
What Has Not Been Disclosed
- Connector details: pin count, pitch, contact geometry and mating-cycle ratings.
- Module dimensions: exact width and height, and how many ports fit on a 1U panel.
- Signaling details: modulation format, supported reach, host SerDes requirements and forward error correction.
- Timeline: MSA membership, specification release date, sampling and pricing.
Our Analysis: What This Means for the Connector
This section is our engineering assessment. It is not published USFP data.
1. 400 Gb/s per lane roughly doubles the frequency problem
If USFP uses PAM4, a 200 Gb/s lane has a Nyquist frequency near 53 GHz, and a 400 Gb/s lane has one near 106 GHz. The modulation format has not been announced, so treat these as estimates. Doubling the lane rate tightens everything the connector controls: bandwidth, impedance, crosstalk and mode conversion. Our PCIe Gen7 connector guide explains how these loss budgets work at 128 GT/s, and the same logic applies here at higher frequencies.
2. Why a two-dimensional array connector
Today's pluggable modules such as OSFP and QSFP-DD mate through card-edge contacts arranged in rows along the module's edge. A two-dimensional array arranges contacts in a grid. That would let designers add lanes without widening the module, which fits the stated path to 32 or more lanes. The release does not give the contact layout, so this is an inference from the term "array".
3. Why two-step insertion
The release says the high-speed contacts engage after the module is inserted. Our reading of the likely goal is to keep the delicate high-speed contacts out of the sliding phase of insertion. That would reduce wear and unwanted contact wipe at the signal contacts. We would expect the final spec to define the mating sequence, including how power, ground and sideband contacts engage first.
4. A 100 W module puts the weight on the cage
Up to 100 W without a dedicated cooling circuit inside the transceiver means the heat has to leave through the module shell and the cage or heat sink on the host side. For this reason, the cage design that TE Connectivity and Amphenol are working on matters as much as the connector itself. It has to manage thermal contact, EMI shielding and alignment together.
5. What to watch next
Watch for the MSA announcement. The details that will matter to connector selection are the contact layout, the insertion sequence, thermal interface requirements and the lane mapping for 16-lane and 32-lane versions.
Specification note: USFP details above come from the NVIDIA and Cisco announcement and may change when the MSA specification is published. Sources: Cisco newsroom and StorageReview.
For more on interconnects in open-standard racks, see our OCP server interconnects hub.
Last updated October 14, 2026. We will update this article when the USFP specification is published.