connectorselectionInterconnect Knowledge Base

What is signal integrity? A beginner's guide

Defining Signal Integrity in Modern Hardware Design

At low clock speeds, digital hardware design relies on a convenient abstraction: signals are either a clean logic high or a logic low, transitioning instantaneously between states. In reality, electricity travels through PCB traces and connectors as electromagnetic waves obeying Maxwell's equations.

Signal Integrity (SI) is the field of engineering focused on ensuring that electrical signals travel from a transmitter to a receiver with sufficient quality to be reliably interpreted by logic circuits. When a signal suffers from poor integrity, the digital receiver misinterprets voltage levels, leading to bit errors, system instability, or total communication failure.

Why Signal Integrity Matters Now More Than Ever

In legacy designs running at low frequencies, edge transition times (rise and fall times) were slow enough that electromagnetic wave behavior was negligible. However, in modern high-speed designs:

  • Rise Times Are Extremely Fast: Signal degradation is driven primarily by the signal's rise time, not just its clock frequency. A 10MHz clock with a 100-picosecond rise time behaves like a high-frequency microwave signal.
  • Lower Supply Voltages Reduce Noise Margins: Modern processors operate at low core voltages (such as 0.8V or 1.2V), shrinking the margin between a logic high and logic low. Even minor noise spikes can trigger logic errors.
  • High Pin Density Increases Coupling: Dense micro-BGA packages and fine-pitch connectors crowd high-speed channels together, dramatically increasing mutual electromagnetic coupling.

The Core Physical Phenomena of Signal Degradation

Four primary physical mechanisms cause signal degradation in PCB layouts and interconnects:

1. Reflections and Impedance Mismatches

When a high-speed signal encounters a change in transmission line impedance—such as a transition from a microstrip trace into a connector pad—a portion of the signal wave reflects back toward the driver. This reflection causes overshoot, undershoot, and ringing on the waveform.

2. Attenuation and High-Frequency Loss

As signals travel down a copper conductor, energy is lost through conductor resistance (exacerbated by the high-frequency skin effect) and dielectric absorption within the PCB material. This high-frequency loss rounds off square wave edges and shrinks signal amplitude.

3. Crosstalk

Crosstalk occurs when the electromagnetic field generated by a switching trace (the aggressor) induces unwanted voltage or current onto an adjacent passive trace (the victim) through capacitive and inductive coupling.

4. Timing Jitter and Phase Noise

Jitter is the short-term deviation of a signal's transition edge from its ideal location in time. Excessive jitter causes the signal edge to cross the receiver threshold too early or too late, closing the horizontal timing window of the data stream.

Visualizing Signal Integrity: The Eye Diagram

The standard tool for evaluating signal integrity in high-speed digital communications is the eye diagram. An eye diagram is generated by overlaying thousands of consecutive bit intervals of a pseudo-random digital waveform on an oscilloscope screen.

A wide-open "eye" indicates excellent signal integrity, low noise, low jitter, and wide voltage margins. As reflections, attenuation, and crosstalk degrade the signal, the eye closes vertically (loss of noise margin) and horizontally (loss of timing margin), signaling an increased Bit Error Rate (BER).

Fundamental Design Rules for Maintaining Signal Integrity

To preserve signal quality across your PCB designs:

  • Maintain Continuous Reference Planes: Always route high-speed signals over solid, uninterrupted ground or power reference planes. Avoid routing signals across split planes or voids, which breaks the return current path and causes severe inductive noise.
  • Control Characteristic Impedance: Design PCB trace widths and dielectric stackups to match target system impedances (typically 50 ohms single-ended or 100 ohms differential).
  • Minimize Via Stubs and Discontinuities: Keep high-speed traces on top layers where possible, or use backdrilling on multi-layer boards to eliminate unterminated via stubs that create resonant signal reflections.
Author

Lemos Young

An electrical engineering professional based in California, specializing in high-speed connector and interconnect solutions for data centers, AI, networking, automotive, and next-generation electronics. Passionate about translating complex engineering concepts into practical insights, he writes about signal integrity, connector technologies, and emerging industry trends. Outside of engineering, he enjoys exploring the latest digital products and innovations that shape the future of technology.